Design and Implementation of Multiple-master, Multiple-slave Interface in AMBA AHB Protocol
Keywords:AHB, AMBA, SOC
The development of VLSI technology makes it possible to combine millions of transistors on a single chip to form a SOC. The main disadvantage confronted here is to verify correct and loss-less communication between the IP cores within the SOC. This can be achieved using standard communication protocols like the Advanced Microcontroller Bus Architecture (AMBA). The Advanced High-Performance Bus (AHB) is an integral part of the AMBA protocol series. It is designed for high-performance system modules. In the proposed paper, the AMBA AHB system is designed and implemented using Verilog HDL. The design is simulated using Xilinx ISE 14.6.
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Copyright (c) 2021 S. Bhavana Surya, C. Hema, M. Shruthi Priya, U. Devikarani, Ashwini S. Rathod
This work is licensed under a Creative Commons Attribution 4.0 International License.